Research Activity
Contact and edge effects in graphene devices
The need to ever improve the performances of field effect transistors (FETs) has made graphene an excellent candidate as channel material in nano-electronic applications. Graphene-based FETs (GFETs) combine an ultra-thin body suitable for aggressive channel length scaling, with excellent intrinsic transport properties, such as the ability to tune the carrier concentration with electrical gates and a carrier mobility exceeding 10 cm/Vs at room temperature. For high performance, the choice of materials and fabrication techniques - both for the contacts and the gate dielectrics- play a very important role. In particular, the contacts between graphene and metal electrodes can significantly affect the electronic transport and limit or impede the full exploitation of the graphene intrinsic properties. Although ohmic contacts are easily obtained on graphene due to the lack of a bandgap, the very small density-of-state of graphene around the Dirac point may suppress the current injection from the metal contacts, thus resulting in non-negligible contact resistance. A high contact resistance limits the total on-state current, and has a detrimental impact on the peak transconductance and on the linearity of current versus gate-voltage characteristic, which are defining transistor parameters. Interface residuals, moistures, trapped charges, etc. may have high impact on the contact resistance and a careful control of the fabrication process is needed. Although in most experimental studies the effect of contact resistance on graphene devices can be suppressed by using a four-probe method, real applications require two-contact devices to achieve high integration. Therefore, understanding and controlling the contact resistance is important from a practical viewpoint other than from the basic physics related to the interface between a 3D metal and a 2D material. However, despite its importance, the contact resistance and its dependence on fabrication procedure and measurement conditions have not been yet exhaustively studied. Thus, it is still unclear why the reported values of contact resistance span a very broad range. In this context we are investigating the contact resistance on mono- and bi-layer graphene sheets by fabricating structures suitable for transfer length method measurements with Ni and Ti metals (materials of choice for micro/nanoelectronics industries). In collaboration with the IHP (Germany) we are producing graphene flakes by exfoliation with adhesive tape from natural graphite and transferred to Si/SiO substrates. A grid of reference markers, with a pitch of ìm in x and y directions, is used to localize the graphene flakes. The markers are patterned by optical lithography and etched in the SiO with a remaining oxide layer of about 100 nmWe normally select mono and bilayer graphene flakes to fabricated TLM structures, each one consisting of parallel leads (often of different length from 1 to 3 ìm) at varying distances along the flake. We pattern metal leads by electron beam lithography and standard lift-off, usually in collaboration at Georgetown University in Washington. Depending on the length of the flake, we deposit up to 6 contacts with inter-electrode distance ranging from 1 to 13 ìmThe Ti and Ni metal leads are typically sputtered after keeping the sample in vacuum (10 mbar) for about 24 hours to possibly remove adsorbates and mixtures from the graphene. Then, we usually perform electrical measurements in Salerno with a Janis cryogenic probe station, working at variable temperature and in high vacuum, and connected to a Keithley 4200 Semiconductor Parameter Analyzer. We generally perform 3-terminal measurements, with the Si substrate as the back-gate and all possible couples of metal electrodes as the source and drain, in order to characterize the device (transfer characteristic, output characteristic, gate dependence, contact dependence, etc.).
References.
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2 I. Meric, et al., Nano Lett. 11,1093 (2011).
S. Das Sarma, S. Adam, E.H. Hwang, E. Rossi, Rev. Mod. Phys. 83, 407 (2011).
4 K. S. Novoselov, A. K. Geim, et al., Science 306, 666 (2004).
J.A. Robinson, et al., Appl. Phys. Lett. 98, 053103 (2011).
6 I. Meric, et al., IEEE IEDM Tech. Dig. 6-8, 556 (2010).
7 S. Kim, et al., Appl. Phys. Lett. 94, 062107 (2009).
8 B. J. Kim, et al., Nano Lett. 10, 3464 (2010).
9 K. Nagashio, et al., Appl. Phys. Lett. 97, 143514 (2010).
10 K. N. Parrish, D. Akinwande, Appl. Phys. Lett. 98, 183505 (2011).
Graphene and CNTs based field emitters
Field-emission is a quantum tunneling phenomenon in which electrons pass from an emitting material (cathode) to an anode through a vacuum barrier by effect of high electric field. For a given material, cathodes with higher aspect ratios and sharper edges produce higher FE currents. For this reason, nanostructures are considered promising for commercial applications as flat-panel displays, vacuum electronics, microwave power tubes, electron sources, etc. Graphene, consisting of a single- or few-graphite layers, has a very high aspect ratio (thickness to lateral size ratio) and a dramatically enhanced local electric field is expected at its edges; it shares many similar or even superior properties as carbon nanotubes and, as CNTs, has high potentiality for FE applications. So far, most of the work we performed is concentrated on graphene characterization of FE properties of several devices, mono and bi layer graphene, individual nanotubes, vertically aligned CNTs, freestanding networks of CNTs. We generally apply two different approaches: first is related to the applicability of scanning probe microscopy techniques for their precision in scanning and manipulation, realizing field emission devices by using the microscope probe as counter-electrode, that allows to have access to characterization of electronic properties on the nanometer scale; second experimental approach is to realize the field emitter device within a scanning electron microscope in which are installed two nanomanipulators for precise definition of the geometrical parameters of the device. Moreover the use of a Keithley 4200-Semiconductor Characterization System, operating as source-measurement unit gives access to high resolution measurements, with current leakage of the order of few pico-Ampere. Recent progress on the large-scale synthesis of single-layer graphene bychemical exfoliation opens up the possibility to investigating their field-emission properties, although assembly of graphene into continuous or patterned films is required for the given utilization of graphene in practical flat-panel displays. The group is continuously working on this topic, in collaboration with local and national partners in order to improve the field emission properties/parameters (low turn-on electric field and threshold field, large field-enhancement factor, and good emission stability and uniformity) either introducing new fabrication techniques or new device configuration. From a theoretical point of view, FE experiments can be analyzed in terms of Fowler–Nordheim theory, the most-commonly used model for FE from a metallic or semiconductor surface under a strong applied field, that is also widely used to investigate the FE from CNTs and graphene.
References.
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D. Li, M. B. Muller, S. Gilje, R. B. Kaner, G. G. Wallace, Nat. Nanotechnol. 3, 101 (2008).
8 R. H. Fowler and L. W. Nordheim, Proc. R. Soc. London, Ser. A 119, 173 (1928).
Origin of anomalies in GFETs transfer characteristics
Transfer characteristics of GFETs, i.e. the drain-to-source current versus gate voltage, IDS–VGS, curves, typically display a symmetric V-shape, with a hole dominated conductance (p-branch) at lower VGS and electron-type transport at more positive gate voltages (n-branch), separated by a valley corresponding to the charge neutrality condition (also known as the Dirac point) with equal electron and hole concentrations. This V-shape reflects the energy distribution of the density of states, and a conductance dropping to zero at the Dirac point should be expected at low temperature; however, in actual devices, impurities and interaction with the surrounding dielectric introduce local fluctuations in the potential causing a finite density of states at the Dirac point; from the carrier viewpoint, these fluctuations result in localized puddles of electrons and holes which produce an appreciable conductance. Noticeably asymmetric and/or anomalously distorted p-branches have been reported. The asymmetry between p- and n-branches was initially explained in terms of different cross sections of electron/hole scattering from charge impurities, but more recently the metal/graphene interaction at the contacts has been considered as a key element. It has been found in particular that, even in the case of weak adhesion, as with Au, the metal electrodes cause the Fermi level EF to shift from the conical point in graphene bands, resulting in doping of graphene either with electrons or with holes; the amount of doping can be deduced from the difference of the metal and graphene work functions and from the potential step due to the metal/graphene chemical interaction. Depending on the polarity of carriers in the bulk of the graphene channel, charge transfer between metal and graphene leads to p–p, n–n or p–n junctions in the vicinity of the contacts which can cause asymmetry. Nouchi et al have studied transfer characteristics in devices with ferromagnetic metal electrodes, reporting anomalously distorted p-branches, with a sort of additional minimum other than the Dirac point. They explain this effect by considering charge transfer from graphene to metal leads and assuming that the presence of an oxide layer spontaneously formed at the metal/graphene interface suppresses the charge density pinning effect, i.e. favours the modulation of the charge-density of graphene at the metal electrodes by the gate voltage. A second conductance minimum to the left of the original Dirac point has also been very recently investigated by Chiu et al for Ti-contacted graphene transistors in the high field regime. They showed that the original Dirac point stays unaffected, while the position of a second Dirac point caused by a drain stress depends on the back-gate voltage, and they argue that a positive charge is trapped at the graphene/oxide interface in the vicinity of the drain; such a charge induces the formation of a p–n junction in the drain region and accordingly they use a model based on a step-potential to account for the observed double Dirac point. A double dip in the transfer characteristic has been also discussed by Barraza-Lopez et al with a first-principles study of the conductance through graphene suspended between Al contacts. They show that the charge transfer at the leads and into the freestanding section gives rise to an electron–hole asymmetry in the conductance; more importantly they suggest that, for sufficiently long junctions, this charge transfer induces two conductance minima at the energies of the two Dirac points of the suspended and clamped regions, respectively.
We already studied Cr/Au contacted long-channel (?ìm) graphene transistors on Si/SiOsubstrate. We also proposed a phenomenological model to explain experimental observation of double dips in the transfer characteristics of GFET devices. The validity of the proposed phenomenological model has been proved by a numerical simulation exploiting the Boltzmann transport equation in describing the diffusive dynamics of the device. We are now investigating similar anomalies in the transfer characteristics of GFETs realized by using different metal contacts.
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3 Nouchi R, Shiraishi M and Suzuki Y, Appl. Phys. Lett. 93 152104 (2008)
4 Nouchi R and Tanigaki K Appl. Phys.Lett. 96 253503 (2010)
5 Novikov D S, et al., Appl. Phys. Lett. 91 102102 (2007)
6 Hwang E H, et al., Phys. Rev. Lett. 98 186806 (2007)
7 Giovannetti G, et al., Phys. Rev. Lett. 101 026803 (2008)
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10 Khomyakov P A, et al., Phys. Rev. B 79 195425 (2009)
11 Chiu H-Y, et al., Nano Lett.10 4634–9 (2010)
Barraza-Lopez S, et al., Phys. Rev. Lett. 104 076807 (2010)